High speed recognition stage for digital input bus
- V_clock up to 27 Mhz (pin 15)
- 8-bit data (pins 18-25)
- 1 sync. line for vector input (pin 16)
- 2 sync. Lines for video input (pins 16-17)
- 1 output strobe signal (pin 3) after each vector recognition
- Digital output bus (pins 4-10)
Timings
- @ 27 Mhz with default vectors of 256 bytes
- Learning time 10 µsec (275 cc)
- Recognition status in 8 µsec (257 cc)
- Best match in 11 µs (275 cc)
- Subsequent match in 3 µs/match (35 cc)
- High speed recognition stage for digital input bus
- V_clock up to 27 Mhz (pin 15)
- 8-bit data (pins 18-25)
- 1 sync. line for vector input (pin 16)
- 2 sync. Lines for video input (pins 16-17)
- 1 output strobe signal (pin 3) after each vector recognition
- Digital output bus (pins 4-10)

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